LAB 03 CprE 305

At this time you have been familiar with basic verilog programming as well as compiling and testing your verilog programs in Max Plus II environment. In this assignment, you will use Max Plus II graphic editor and verilog to program two basic computational structures – multiplexers and decoders.

To refresh your memory, a multiplexer is an element where control bits are used to select 1 of N inputs to be placed on the output line. In other words, the output line should reflect what is on the selected input line, a logical 1 or logical 0.

A decoder is an element that has N output, each one representing a particular combination of input bits. The corresponding output signal is at logic 0. All other outputs are at logic 1. For an n-bit decoder, there are 2ⁿ output lines. A decoder may also include an enable signal. If the enable signal is logic 0, all outputs remain at logic 1.

1. Draw the gate-level design of a 2-to-1 multiplexer use graphic editor. Let the TA check your design.

2. Run through the process of creating a default symbol, adding inputs and outputs in the graphics editor. Create sample-input waveforms. Run the simulation and verify the design.

3. Using the Max +plus II software, write verilog code for 2-to-1 multiplexers based on your design in step 1. Verify you get the same waveform results for step 1 and for your verilog code for 2-to-1 multiplexer in this step.

Design these modules carefully as they modules will be used in future labs as part of more complex designs. Save your work into your personal folder.

4. Write verilog modules for 4-to-1 and 8-to-1 multiplexers. Your 4-to-1 multiplexer code should reuse your 2-to-1 code, and 8-to-1 code should reuse in 4-to-1 code. Simulate and verify the waveform results of your code.

5. Create verilog modules for 2-to-4, 3-to-8, and 4-to-16 decoders with enable signal. For now, you should set the decoders so that the “selected” output line for the given N inputs is logical 0, while all other lines are logical 1. Again, more complex modules should reuse simpler ones.

6. Show the TA the waveform results of your 4-to-16 decoder with enable signal on and off.