Mini-Project
  Prelab signature - 20
     For this, a significant completion is what is required, up to 6.0.  All is not required.

  4.0 5 - work (Should be a SOP circuit that implements B)  

  5.0 5 - shorthand SOP expression
      5 - Verilog expression for B
      10 - TA initials

  6.0 5 - completed truth table and K-map
      5 - simplified SOP expression

  7.0 5 - either a circuit or a Verilog expression for P.
      10 - TA initials

  8.0 10 - a circuit diagram implementing P using a block for B and a minimum of extra gates 
      (-1 for every additional gate over three gates, not to exceed -7 points total for this)
      20 - TA initials

Total - 100